Abstract
The silicon cochlea implements the biophysics of the human cochlea on an analog electronic chip. I shall demonstrate the operation of a 61dB, 0.5mW analog VLSI silicon cochlea. An engineering analysis of this cochlea suggests why the ear is designed as a distributed traveling wave amplifier rather than as a bank of bandpass filters: Such an architecture is a very efficient way of implementing a high resolution, high filter order, wide dynamic range frequency analyzer. I shall outline work on constructing low-power cochlear-implant processors that are based on circuits in the silicon cochlea as well as work on constructing a distributed-gain-control silicon-cochlea-based cochlear-implant processor. These processors have promise for cutting power dissipation by more than an order of magnitude in today’s implant processors and for improving patient performance in noise.